Intel Principal Engineer in Folsom, California

Job Description

Principal Engineers at Intel are active technical leaders inside and outside the company. Activities include participation in major industry and academic conferences, voting membership in international standards committees, generation of patents and technical papers. Note - This job code can only be assigned if an employee has participated in an official Technical Leadership Program (TLp) nomination process for his/her business group. An employee's manager must confirm participation in TLp nomination process prior to job code assignment.



  • The candidate should possess a MS/PhD in electrical Engineering EE/ECE with 15+ years of Analog/Mixed signal circuit design industry experience.

Minimum Qualifications:

  • Minimum of 15 years of having gone through multiple product cycles from definition to design to pre/post-silicon validation to product qualification.

  • Minimum of 15 years of experience in 2D or 3D NAND or NOR or PCM non-volatile memory design experience

  • Minimum of 15 years of experience in strong fundamentals in Flash-cell/Semiconductor device physics, transistor level analog/mixed signal design.

  • Candidate should have a minimum of 15 years experience with circuit design, layout, circuit reliability tools/methodologies.

Preferred Qualifications:

  • Candidate should have experience designing analog blocks used in non-volatile memory designs e.g. high-voltage pumps, regulators, bandgaps, reference generators, power-detectors. - Candidate should be familiar with Non-volatile memory design methodologies & nomenclatures.

  • Guidance to develop test plans for silicon characterization, document all design work with review materials and detailed design descriptions as well as participate in the writing of datasheets and application notes for customers.

  • Candidate should have hands-on array core, data cache, sense amplifier and array driver designs experience with 2D or 3D NAND designs, ROM macro design and validation.

  • The candidates should have experience in running fullchip hsim and verilog simulations for usermode and testmodes.

  • Writing verilog AMS models for analog circuits for top level verification is highly desirable including setting up of verification environment.

Inside this Business Group

Non-Volatile Solutions Memory Group: The Non-Volatile Memory Solutions Group is a worldwide organization that delivers NAND flash memory products for use in Solid State Drives (SSDs), portable memory storage devices, digital camera memory cards, and other devices. The group is responsible for NVM technology design and development, complete Solid State Drive (SSD) system hardware and firmware development, as well as wafer and SSD manufacturing.

Posting Statement. Intel prohibits discrimination based on race, color, religion, gender, national origin, age, disability, veteran status, marital status, pregnancy, gender expression or identity, sexual orientation or any other legally protected status.

Position of Trust. This role is a Position of Trust. Should you accept this position, you must consent to and pass an extended Background Investigation, which includes (subject to country law), extended education, SEC sanctions, and additional criminal and civil checks. For internals, this investigation may or may not be completed prior to starting the position. For additional questions, please contact your Talent Consultant.