Intel Hardware Intern in Hillsboro, Oregon
Candidate will support the team interface high performance FPGAs with high performance CPUs.
Job responsibilities include but are not limited to:
Designing high speed RTL logic design for tightly coupled FPGA accelerators.
Designing and developing high speed RTL code using Verilog/System Verilog.
Be able to drive timing closure for high speed design with multiple clock domains.
System debug & Validation of FPGA prototype systems.
Performance analysis and tuning of workloads on heterogeneous platform.
Design with High speed IO.
You must possess the below minimum qualifications to be initially considered for this position. Experience listed below would be obtained through a combination of your school work/classes/research and/or relevant previous job and/or internship experiences.
-Must be pursuing a Master's or PhD in Electrical Engineering, Computer Science or related field.
-Minimum of one year of experience in:
Hardware development using Verilog or System Verilog.
Design of high speed digital logic, including timing analysis/closure.
FPGA and/or ASIC design tools used for RTL development.
-SW application coding in C, C++, Python
Inside this Business Group
The Data Center Group (DCG) is at the heart of Intel’s transformation from a PC company to a company that runs the cloud and billions of smart, connected computing devices. The data center is the underpinning for every data-driven service, from artificial intelligence to 5G to high-performance computing, and DCG delivers the products and technologies—spanning software, processors, storage, I/O, and networking solutions—that fuel cloud, communications, enterprise, and government data centers around the world.
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