Intel SOC Design Engineer in Hillsboro, Oregon
Responsibilities will include one or more of the following:RTL to block level physical design execution and methodology which includes logic synthesis, auto-place and route, extraction, low power design, static timing analysis and convergence, logical equivalence verification, reliability convergence, layout verification of tape-out databases. Interface with ASIC/SOC design teams to understand the design requirements and resolve flows and methodology issues related to synthesis and place&route.Develop automation flows on Industry standard tools to generate high performance and compact designs with a high degree of quality.
You must possess the below minimum qualifications to be initially considered for this position. Experience listed below would be obtained through a combination of your school work/classes/research and/or relevant previous job and/or internship.
• Bachelor or Master of Science degree in Electrical Engineering, Computer Engineering or any related field.
3 to 6 months experience in:
• Standard-cell based VLSI design methodology and relevant Synopsys or Cadence EDA tools.
• ASIC/SOC design convergence.
• Scripting with Unix shell, Perl and TCL.Self-driven
• Excellent communication and leadership skills.
• Ability to prioritize work and accomplish tasks quickly with good problem solving skills.
Inside this Business Group
As the world's largest chip manufacturer, Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support. Employees in the Technology and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moore’s Law to bring smart, connected devices to every person on Earth
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