Intel MIPI IP Design Engineer in San Jose, California

Job Description

As part of Intel, we will continue to apply Moore’s Law to drive the future of field-programmable gate array (FPGA) technology. The Programmable Solutions Group (PSG) has been delivering industry-leading custom logic solutions to customers since inventing the world's first reprogrammable logic device in 1984. In order to take advantage of the many opportunities that we see in the future for FPGA’s, PSG is looking for great MIPI IP Design Engineers to join our team.

As a MIPI IP Design Engineers in the IP development department, you will be developing & maintaining critical hardware IP used in latest FPGAs. You will work in a dynamic team dealing with multiple complex hardware IP. Your responsibilities will include, but not limited to architecture, design, integration, and verification of hardware IP.

Please be informed that Intel is proactively trying to find candidates for a position and that may, or may not, be available for all location(s) at this time. We encourage you to apply, and our hiring team will be glad to contact you when relevant

Qualifications

• BS in Electrical Engineering, or related. • At least 5 years of experience in a ASIC OR FPGA IP design • 3 years of experience in MIPI Camera Serial Interface (CSI)

Preferred (Additional) Qualifications

• MSEE, MSCS, or MS in Computer Engineering or related • Experience with scripting Languages like Gmake/Perl/Tcl/Python. • Experience with tools such as VCS, NCSIM, Verdi, and Spyglass • Experience with Lint, CDC, Synthesis, equivalence checking. • Experience with Multiple Clock Domains and Asynchronous Interfaces. • Familiarity with automated front end design flows

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