Intel Power Analysis Engineer in San Jose, California
As a key member of PSG Programmable Solution Group power team, you will be responsible for all aspects of FPGA power analysis and optimization. Responsibilities include power and performance analysis, power model generation and maintenance, cross functional collaboration to define system level power optimization solution, and power integrity verification.
The successful candidate's minimum qualifications will include the following:
BS/MS in Electrical Engineering, Computer Science, or equivalent
A minimum of 5 years of related experience
Solid understanding of chip and system level power and performance tradeoff and optimization
Experience in power model generation, chip power management, and low power strategy
Familiar with Verilog and Spice.
Experience with UPF, Verdi, Redhawk, power IR/EM, and power on sequence is a plus
Comfortable with PERL/Python, TCL, Linux Shells
Excellent execution and strong drive to close complex design issues
Inside this Business Group
The Programmable Solutions Group (PSG) was formed from the acquisition of Altera. As part of Intel, PSG will create market-leading programmable logic devices that deliver a wider range of capabilities than customers experience today. Combining Altera's industry-leading FPGA technology and customer support with Intel's world-class semiconductor manufacturing capabilities will enable customers to create the next generation of electronic systems with unmatched performance and power efficiency. PSG takes pride in creating an energetic and dynamic work environment that is driven by ingenuity and innovation. We believe the growth and success of our group is directly linked to the growth and satisfaction of our employees. That is why PSG is committed to a work environment that is flexible and collaborative, and allows our employees to reach their full potential.
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