Intel Senior System Engineer in San Jose, California
Work in SERDES design team with a group of talented design engineers to develop, implement, verify and test solutions to optimize complex analog circuits in high-speed transceivers.
You will work cross-functionally with system engineers in silicon bring-up, debug, characterization and correlation
M.S. degree in Electrical Engineering with a minimum of 10 years of working experience.
Good knowledge in signal and power integrity.
Good knowledge of high-speed serial link protocols.
Thorough knowledge in high-speed serial link bring-up, debug and characterization.
Good knowledge in high-speed serial link equalization and CDR schemes.
Experience with tools such as Quartus II and Qsys
Knowledge of FPGA design with Verilog HDL
Ability to perform debugging of bare metal embedded systems with limited visibility
Knowledge of the GNU tool chain and experience writing/modifying linker scripts for gcc and ldKnowledge in Verilog HDL, C programming and assembly language programming for the NIOS II ISA
Inside this Business Group
The Programmable Solutions Group (PSG) was formed from the acquisition of Altera. As part of Intel, PSG will create market-leading programmable logic devices that deliver a wider range of capabilities than customers experience today. Combining Altera's industry-leading FPGA technology and customer support with Intel's world-class semiconductor manufacturing capabilities will enable customers to create the next generation of electronic systems with unmatched performance and power efficiency. PSG takes pride in creating an energetic and dynamic work environment that is driven by ingenuity and innovation. We believe the growth and success of our group is directly linked to the growth and satisfaction of our employees. That is why PSG is committed to a work environment that is flexible and collaborative, and allows our employees to reach their full potential.
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