Intel SoC Architect and Design Lead in San Jose, California
Intel PSG Hardware Engineering Team is looking for a system on a chip (SoC) architect/micro-architect for the design of complex silicon sub-systems that are used by our customers. The successful candidate will be responsible for architecting/micro-architecting complex protocol and accelerator engines that are used with Intel FPGA and High speed Serdes using advanced process nodes, responsible for closing architecture and micro-architecture requirements; technical specifications of the chip and IP blocks to meet those requirements, provide technical direction to team members including design, design verification and physical design, lead the results analysis to ensure quality tape-out of the product, work cross functionally to identify and assess technical issues/risks while proactively developing solutions to achieve product requirements, and be able to work seamlessly across multiple organizations while working a complex set of technical issues.
Please be informed that Intel is proactively trying to find candidates for a position and that may, or may not, be available for all location(s) at this time. If you're interested in this position, we encourage you to apply, and our hiring team will be glad to contact you if/when relevant.
• BSEE or related • 12+ years of experience developing complex ASICs, FPGAs. • Experience specifying, developing, and development of complex IP/ASICs/FPGAs • Experience with SoC architecture and protocols including CPUs and peripherals (PCIe, Ethernet, Interlaken) • Experience using 3rd party IP
ADDITIONAL (PREFERRED) QUALIFICATIONS
• MSEE or related or other post graduate education • More than 15 years of experience developing complex ASICs, FPGAs. • Experience working with a team across multiple sites (US and overseas)
US, California, Santa Clara;
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