Intel Senior Optical Transceiver Design Engineer in Santa Clara, California
Responsible for integrated design of optical transceiver modules at 100Gbps, 400Gbps and beyond in Intel's Silicon Photonics Products Division.- Define transceiver module architecture and engineering specifications based on product-level requirements from technical marketing team- Interact with broad interdisciplinary team composed of experts in optical devices, electrical ICs, optical and electrical component packaging, PCB design, mechanical/thermal design, firmware and embedded software, manufacturing operations and test, design validation, quality and reliability, etc. to deliver optical transceivers from R&D to high-volume production with superior performance, reliability, cost and time to market versus the competition
MS degree in electrical engineering preferably with emphasis in opto-electronics and/or microwave/mm-wave IC design. Minimum of 6 years relevant industry experience in multi-channel optical transceivers employing serial links operating at 10Gbps and 25Gbps per channel, and a successful track record as defined by achieving design wins at a major enterprise switch vendor and/or internet cloud service provider of leading multiple projects preferably one of which is 100Gbps QSFP from R&D to high volume production. Expert level knowledge of relevant industry standards, such as 100G-PSM4 and 100G-CWDM4 MSAs and relevant IEEE Std. 802.3 clauses, IEEE 802.3bs draft 400GBASE-R PCS and PMA clauses especially -DR4, -FR8 and 400GAUI-8, SFF QSFP, QSFP-DD MSA draft, OIF Implementation Agreement CEI-28G-VSR and draft CEI-56G-VSR, FibreChannel MSJQ, I2C, MDIO, SPIExtensive experience and knowledge of relevant components, such as semiconductor lasers, photodiodes, optical multiplexers and de-multiplexers, electro-absorption modulators, Mach-Zehnder interferometer modulators, CDRs, TIAs, laser/modulator drivers, switching and linear voltage regulators, ADCs, DACs, MCUs, NVM preferably flash, TECs, etc., with the ability to provide critical design feedback to internal and external partner component design teams. Extensive experience with schematic design, PCB layout design and/or supervision including PCB stack-up selection and routing for signal and power integrity, including familiarity with PCB fabrication flow and SMT assembly/test flow. Experience defining and documenting engineering/architecture specifications based on strong knowledge of relevant trade-offs and risks, defining and executing characterization and design validation test plans, proven ability to perform component-level, package/PCB-level circuit and system-level incl. FW control-loop algorithm debug and devise design solutions. Extensive experience and familiarity with high-speed 10Gbps test equipment, including real-time scopes, sampling scopes optical and electrical, PPGs, bit error rate detectors- Familiarity with RF design, characterization and testing concepts/equipment S-parameters, Vector Network Analyzers, TDR, high-speed Signal Integrity simulation and link performance metrics e.g., ADS and/or Sigrity
Inside this Business Group
The Data Center Group (DCG) is at the heart of Intel’s transformation from a PC company to a company that runs the cloud and billions of smart, connected computing devices. The data center is the underpinning for every data-driven service, from artificial intelligence to 5G to high-performance computing, and DCG delivers the products and technologies—spanning software, processors, storage, I/O, and networking solutions—that fuel cloud, communications, enterprise, and government data centers around the world.
Posting Statement. Intel prohibits discrimination based on race, color, religion, gender, national origin, age, disability, veteran status, marital status, pregnancy, gender expression or identity, sexual orientation or any other legally protected status.