Intel Emulation Engineer in Austin, Texas

Job Description

  • Creates emulation/Field Programmable Gate Array FPGA models from a Register Transfer Level RTL design using emulation/FPGA synthesis, partitioning and routing tools.

  • Defines and documents RTL changes required for emulation/FPGA.

  • Develops hardware and software collaterals and integrates it with the emulation/FPGA model.

  • Tests and debugs the emulation/FPGA model and collaterals.

  • Defines and develops new capabilities & HW/SW tools to enable acceleration of RTL and improve emulation/FPGA model usability for preSilicon and postSilicon functional validation as well as SW development/validation.

  • Develops improvements to usability by RTL validation and debugging of failing RTL tests on the emulation platform.

  • Interfaces with and provides guidance to presilicon Validation teams for optimizing preSi validation environments, test suites and methodologies for emulation efficiency.

  • Develops and applies automation aids, flows and scripts in support of emulation easeofuse and improvement of equipment utilization.


Minimum Qualifications:

Bachelor's or Master's Degree in Electrical Engineering, Computer Science or relevant discipline and 5+ years of experience in the following relevant areas:

  • Good understanding of modern super scalable microprocessor, graphics and PC chip-set architecture and function

  • Experience in Verilog* and/or VHDL RTL simulation based validation and debug

  • Understanding of power on reset/initialization sequence and clocking architecture for microprocessors, graphics and/or PC chip-set

  • Experience in definition, development and validation of reset and initialization sequence for various device configurations in manufacturing test, design validation and component debug

  • Analytical and problem solving skills

  • Excellent communication and interpersonal skills

  • Experience in Perl, C/C++ and UNIX*

Preferred Qualifications:

  • Experience in pre-silicon validation of microprocessor architecture/micro-architecture or Design-for-Test/Design-for-Debug features would be an added advantage.

Inside this Business Group

The Platform Engineering Group (PEG) is responsible for the design, development, and production of system-on-a-chip (SoC) products that go into Intel’s next generation client and mobile platforms. PEG strives to lead the industry moving forward through product innovation and world class engineering.

Other Locations

US, California, Folsom;US, California, Santa Clara;US, Oregon, Hillsboro

Posting Statement. Intel prohibits discrimination based on race, color, religion, gender, national origin, age, disability, veteran status, marital status, pregnancy, gender expression or identity, sexual orientation or any other legally protected status.