Intel Infrastructure & Platform Solutions Group (IPSG) Undergrad Hiring in Folsom, California

Job Description

Creates, defines and develops system validation environment and test suites. Uses and applies emulation and platform-level tools and techniques to ensure performance to spec. Responsible for the development of methodologies, execution of validation plans, and debug of failures. Requires broad understanding of multiple system areas and requires interfaces with Architecture, Design, and Pre-silicon Validation teams in improving post-silicon test content and providing feedback for future on-die debug features.

Infrastructure & Platform Solutions Group (IPSG) builds the silicon and platform infrastructure for Intel’s design teams. IPSG is comprised of a reusable pool of infrastructure IP blocks, design enabling services such as tools and automation and best in class post silicon ecosystem that ramps quickly to high volume manufacturing and validation. is made up of 7 major groups

  • Chipsets and IP Group (CIG) D evelops Test Chips, Hardware & Software IP technology for Intel.

  • FAST delivers silicon technology enablement, end-to-end project management, analysis and infrastructure and debug architecture, enabling and execution for all TSCG products and platforms.

  • Mixed-signal IP Group (MIG) : empowers Intel SoCs with leading Mixed-signal IP.

  • Product Enablement Solutions Group (PESG) : enables & augments product development teams by providing holistic end-to-end design environment that spans system level to tape-in/out to deliver products efficiently with competitive PPA. PESG provides standards based best-in-class tools and flows by partnering with EDA ecosystem and differentiate where EDA providers do not have a solution. We provide standards based environment for Architectural Analysis and a Virtual Prototyping environment to accelerate Time to Quality Software. We provide consistent technology enablement for both Intel & Foundry process technologies.

  • Manufacturing Validation and Performance (MVP) is responsible for test development and validation of Intel microprocessors, system-on-chips, chipset products, and is the center of excellence for performance and power analyses. We support Intel’s products as the link between product design and high volume manufacturing—we help ensure Intel products are competitive and go through rigorous quality test and validation before shipping to our customers.

  • Technology and Innovation Office (TIO) : Transforming Intel by providing the Innovative spark

  • SecIP Group: This group provides security IP Blocks “hardware & Software” to all of Intel Platform design teams.

This is an entry level position a will be compensated accordingly.

Qualifications

You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Experience listed below would be obtained through relevant previous school, industry jobs and/or research experience.

Minimum Qualifications:

Candidates must have a degree in Electrical Engineering, Electrical Computing Engineering or related field.

This U.S. position is open to U.S. Workers Only. A U.S. Worker is someone who is either a U.S. Citizen, U.S. National, U.S. Lawful Permanent Resident, or a person granted Refugee or Asylum status by the U.S. Government. Intel will not sponsor a foreign national for this position.

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Other Locations

US, Arizona, Phoenix;US, California, Santa Clara;US, Colorado, Fort Collins;US, Oregon, Hillsboro;US, Texas, Austin

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.