Intel Mixed Signal IP Validation and Debug Engineer in Folsom, California

Job Description

Validates, Tests, develops, modifies and evaluates complex analog and mixed signal electronic parts, components or integrated circuitry for analog and mixed signal electronic equipment and other hardware systems. Determines creative Validation, debug nd test approaches and parameters. Analyzes equipment to establish operating data. Conducts experimental tests and evaluates results. Applies and uses independent evaluation to selects components and equipment based on analysis of specifications and reliability. Evaluates practical capability of vendor to support product development. Also includes Analog, MixedSignal and RF Validation and Debug Engineers with specialized skills and expertise in developing Monolithic Integrated Circuits for wireless and wireline communications systems and products using CMOS, BiCMOS, SiGe, GaAs Process technologies.


IPSG-Mixed Signal IP and Solutions Group is looking for Leading the IP validation and debug team across multiple IPs. MIG delivers IP across the spectrum for client, devices, server and other business SOCs in Intel. MIG IP portfolio includes Ethernet, DDR, MIPI DPHY, Display, TypeC, PCIE, UFS, USB3, Die2Die and several others.

This job posting is for Mixed Signal IP Electrical Validation and debug Engineer responsible for validating and debugging Mixed Signal design blocks as well as System validation on both test chips and Product SOCs. Responsible for the development of methodologies, execution of validation plans, and debug of failures. The position requires broad understanding of multiple system areas and requires interfaces with Architecture, Design, Pre-silicon Verification, FW engineering, Post-silicon system validation, manufacturing test, Power and reliability teams. You will also be responsible to Investigative and resolves complex issues with hardware/BIOS/Firmware/Operating System implementations and recommends solutions to HW and SW engineering.

The responsibilities would include

� Post-silicon readiness, Electrical validation, Functional Validation and Power Validation execution on Test chips

� Critical debug of IP sightings on Product SOCS

� Integrated HW and FW co-validation and enabling on Test chips and Products

� Pre-silicon validation on Circuit, Logic and Mixed Signal to better execute and debug in Post-silicon

� Integrated FPGA based controller and IP PHY End to End validation on Test chips

� SW development for Post-silicon enabling

� Developing Simulation and Silicon based Test planned execution and closed loop feedback

� Influencing Product Post-silicon validation and Manufacturing test partners with right IP centric Test plans, test execution and tracking progress


Minimum Qualifications:

� BS or MS Degree in EE/CS or a related field.

� 2+ years of experience in one or more of the following areas: Post-silicon Electrical Validation, Post-silicon Functional validation, Circuit Design, Logic Design, Circuit verification, Logic Verification, Mixed-Signal Verification

Desired qualifications:

� Experience in Post-silicon Electrical Validation and Debug

� Experience in Lab equipment's such as BERT, Oscilloscopes, Logic Analyzers, AWGs

� Experience in Protocol testing on PCIE, USB3, TBT, DDR, MIPI, and Display Electrical Specifications test.

� Experience in SW such as Python, C, C+ Inside this Business Group

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance....