Intel Pre-Silicon Validation Engineer in Folsom, California
Develop preSilicon functional validation tests to verify system will meet design requirements
Create test plans for RTL validation, defining and running system simulation models, and find and implement corrective measures for failing RTL tests
Analyze and use results to modify testing.
B.S. or M.S. Degree in Electrical Engineering, Computer Engineering, or equivalent discipline
3+ years of experience in the pre-Silicon validation of complex digital and/or mixed signal designs
Excellent written and verbal communications skills and demonstrated ability to work effectively in a team environment.
Experience and working knowledge in several of the following areas:
System Verilog UVM/OVM based validation and environment development
IP level validation
IO/PHY validation and protocols e.g. PCIE, USB, SATA, DP, TBT, HDMI, GBE
Implementation of checkers and bus functional models
Mixed signal validation
C code based validation in processor based environments
Understanding of signal processing, transmission line theory and communication systems
Gate level validation
Inside this Business Group
The Platform Engineering Group (PEG) is responsible for the design, development, and production of system-on-a-chip (SoC) products that go into Intel’s next generation client and mobile platforms. PEG strives to lead the industry moving forward through product innovation and world class engineering.
US, Arizona, Phoenix;US, California, Santa Clara
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