Intel Structural Design Engineer in Fort Collins, Colorado
As a Senior SoC Design Engineer, you will be part of a talented team of engineers that takes designs from RTL to complete physical implementation, in a fast-paced technically challenging environment.
Your responsibilities will include but not be limited to:
Chip and block level floor planning, taking into account timing and area budgets
Netlist generation, including logic synthesis, constraints, timing analysis and equivalence checking FEV
Place-and-Route APR using Synopsys ICC, timing verification using Synopsys PrimeTime, power analysis
Physical verification of the layout LVS, DRC, ERC
The ideal candidate should exhibit the following traits:
Highly motivated technical expert with good communication and presentation skills
Strong analytical ability and problem solving skills
Ability to multi-task and flexibility to work in global environment
Good communication skills and strong motivation for customer support
B.S. degree in EE/CS with 2+ years of relevant experience or M.S. in EE/CS with 1+ years of experience
Strong expertise in either custom digital design or the industry standard RTL2GDSII flow development or design implementation in leading process technologies 28nm or below
For RTL2GDSII experience, must have a good understanding of the RTL2GDSII concepts related to synthesis, place & route, CTS, timing convergence, layout closure, UPF based power methodology, and experience working with tools like ICC, PrimeTime, used in the RTL2GDSII implementation
Expertise on high frequency clocking methodologies
Good automation skills in PERL, TCL, tool specific scripting on one of the industry leading Place & Route tools
Inside this Business Group
The Platform Engineering Group (PEG) is responsible for the design, development, and production of system-on-a-chip (SoC) products that go into Intel’s next generation client and mobile platforms. PEG strives to lead the industry moving forward through product innovation and world class engineering.
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