Intel CPU Performance Verification Engineer in Hillsboro, Oregon

Job Description

In this position, you will join the next generation CPU architecture team and will be responsible for performance modeling and performance validating the RTL implementation of new architecture and micro-architecture capabilities.

Your responsibilities may include, but are not limited to, the following:

  • Performance modeling of existing and new architectural features.

  • Analysis of CPU workloads and their power and performance on existing and new CPU architectures.

  • Technical ownership of performance validation of a microarchitecture feature or block, methodology, or otherwise significant aspect of CPU performance validation

  • Investigating new techniques to accelerate performance validation of CPU hardware, firmware, and software domains

  • Developing validation content such as tools, tests, and performance checkers to match the complexity of new core and be reused in pre-si and post-si verification.

  • Read and interpret technical specs and create high quality technical documentation like modeling strategy, test plans, strategy documents

  • Collaborating and communicating with architecture, design, software, firmware, pre-si and post-si validation, and other teams to achieve project goals

  • Contributing to post-silicon debug preparation and sighting resolution

Qualifications

Minimum Requirements:

M.S. in Computer Engineering or Electrical Engineering plus 1 year of relevant work experience OR B.S. in Computer Engineering or Electrical Engineering plus 3 years of relevant work experience.

Knowledge of a hardware modeling language (RTL), such as Verilog, VHDL, or System Verilog and industry standard logic simulation tools

Total of 2 years of academic and/or work experience in one or more of the following areas:

  • Computer architecture knowledge, including specific areas in CPU/Core micro-architecture

  • Performance Modeling and Analysis of CPUs

  • Validation and debug experience including test writing/generation, checker development, coverage analysis, failure debug, root cause analysis

  • Assembly language programming, code generation, or other low-level software experience

  • Proficiency and programming experience in C/C

  • Programming experience in at least one scripting language: Perl, Python, Ruby, Java, TCL, etc.

Preferred Requirements:

  • Validation environment development in Verilog, Specman, System Verilog UVM/OVM

  • Intel or industry experience in micro-architecture, design or verification of CPU cores

  • Knowledge of Intel Architecture ISA and system architecture, x86 assembly language

  • Familiarity with software validation, including microcode, firmware, etc.

  • Experience in post-silicon debug and analysis

  • Strong communication and collaboration skills and ability to tolerate ambiguity and highly complex decision environments

Inside this Business Group

The Platform Engineering Group (PEG) is responsible for the design, development, and production of system-on-a-chip (SoC) products that go into Intel’s next generation client and mobile platforms. PEG strives to lead the industry moving forward through product innovation and world class engineering.

Other Locations

US, California, Santa Clara

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