Intel IP Pre-Silicon Validation Engineer in Hillsboro, Oregon

Job Description

In this position, your responsibilities will include, but not be limited to:

  • Developing pre-silicon verification for next-generation high performance computing chip-to-chip interconnects

  • Developing pre-silicon verification test plans, test environment/test-bench, test stimulus and checking

  • Close collaboration with architects and logic/analog designers


The successful candidate should have a strong technical background in micro-architecture design, logic/verification methodology. Should be passionate about working in a dynamic environment where the expectation is to contribute in any activity that makes the business successful.

Minimum Qualifications:

  • Candidate should possess at least a Bachelor's degree with 3 years' experience, or a Master's degree with 2 years' experience. Degree should be in Electrical Engineering, Computer Engineering, or Computer Science

  • Experience working on pre-Silicon validation/verification required

  • Demonstrated ability to execute test plans for wide feature set is required

  • Candidate should possess excellent written and oral communication skills

Preferred Qualifications:

  • Experience with mixed-signal validation concepts

  • Familiarity with pre-Silicon simulation tool flows required. Example tools include (but not limited to): Synopsys VCS, Verdi, Discovery-AMS, and DVE

  • Knowledge of UVM/OVM and constrained random validation

  • Knowledge of mixed-signal IP, including memory PHYs and High-Speed IOs

  • Scripting and tool flow automation knowledge, such as Python/Perl

Inside this Business Group

The Platform Engineering Group (PEG) is responsible for the design, development, and production of system-on-a-chip (SoC) products that go into Intel’s next generation client and mobile platforms. PEG strives to lead the industry moving forward through product innovation and world class engineering.

Other Locations

US, California, Santa Clara

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