Intel Platform Targeting Manager in Hillsboro, Oregon

Job Description

Responsible for leading a team of PPA (power, performance & area) & EoU (ease of use) modeling and target prediction experts, who can provide detailed technical feedback and input into the PPA / EoU validation team as well as the process technology development team on what process technology changes and features are being potentially implemented by the foundry competition to achieve their best-in-clasee PPA & EoU targets.

  • Perform feature and / or landing zone trade off analysis with transistor, metal stack, library, memory and analog architects and process technology engineers to ensure that we fully comprehend how the competitive foundries are enabling best-in-class process technology & product performance.

  • Participate in block-level and foundational IP level benchmarking exercises to replicate and predict where the foundry competition is at and will be in the future, so that we can better understand the feature and / or landing zone trade offs that are being considered across the industry.

  • Manage a team of technical platform domain experts (in libraries, memories, foundational IOs, place & route, Performance / Power / Area (PPA) and Ease-of-Use (EoU) forecasting & analysis) to engage in DTCO (design-technology co-optimization) and technology platform specification initiatives that enable technology platform definition that's driven by market-based PPA and EoU competitive technical targets

  • Interact with fellow DTCO partners to ensure that we're aligned on market-based targets that can used during the DTCO engagement to make key technology feature decisions / trade-offs and help the organization understand the implications and impact of these decisions on platform targets

  • Interact with internal and external customers to ensure that we develop a lite platform specification that can be used to stabilize feature set & trade-offs and minimize the number of discrete platforms needed to serve the largest number of market segments and product volumes

  • Develop PPA & EoU forecasting methodologies, models and tools, so that we can improve our ability to reasonably and accurately predict where the competition will in future process nodes and technology platforms


  • At least 15 years of job experience in key domain areas like transistors, metal stacks, library, memory, foundational IO, place & route, and / or market-target based forecasting and analysis

  • At least a Bachelor of Electrical Engineering with some coursework completed towards a Masters or PhD candidacy

Inside this Business Group

As the world's largest chip manufacturer, Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support. Employees in the Technology and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moore’s Law to bring smart, connected devices to every person on Earth

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance....

Position of Trust

This role is a Position of Trust. Should you accept this position, you must consent to and pass an extended Background Investigation, which includes (subject to country law), extended education, SEC sanctions, and additional criminal and civil checks. For internals, this investigation may or may not be completed prior to starting the position. For additional questions, please contact your Recruiter....