Intel SoC Design Engineer RTL Logic Designer in Hillsboro, Oregon

Job Description

Come join Intel's Scalable Performance CPU Development Group SDG as an IP Engineer working on exciting products! We are seeking an experienced uArch/Logic/RTL engineer to work with a dynamic team designing Intel's next generation IP for server and client products.

The successful candidate will bring...

  • Strong communication and teamwork experience/skills

  • Experience driving/managing a dynamic work environment.

  • Flexibility to wear different hats (and perform different roles) throughout the project and continuously upgrade your skills

You will also be

  • Developing functional block/unit RTL for architectural features and optimizing for power, area, and timing.

  • Developing and recommending better design methods/practices to enable better synthesis convergence.

  • Performing all aspects of design flow from logic synthesis, place and route, FEV, power, timing, quality checks.

Qualifications

  • 5+ years of experience in logic design, micro architecture, VLSI, and/or VLSI design with a BSEE, BSCE, or related engineering degree (masters degree with 3+ years of such experience will also be considered)

  • DFX experience is a plus

Inside this Business Group

The Platform Engineering Group (PEG) is responsible for the design, development, and production of system-on-a-chip (SoC) products that go into Intel’s next generation client and mobile platforms. PEG strives to lead the industry moving forward through product innovation and world class engineering.

Posting Statement. Intel prohibits discrimination based on race, color, religion, gender, national origin, age, disability, veteran status, marital status, pregnancy, gender expression or identity, sexual orientation or any other legally protected status.