Intel IP Structural Design Engineer in Hudson, Massachusetts
Oversees definition, design, verification, and documentation for SoC System on a Chip development. Determines architecture design, logic design, and system simulation. Defines module interfaces/formats for simulation. Performs Logic design for integration of cell libraries, functional units and subsystems into SoC full chip designs, Register Transfer Level coding, and simulation for SoCs. Contributes to the development of multidimensional designs involving the layout of complex integrated circuits. Performs all aspects of the SoC design flow from highlevel design to synthesis, place and route, timing and power to create a design database that is ready for manufacturing. Analyzes equipment to establish operation infrastructure, conducts experimental tests, and evaluates results. May also review vendor capability to support development.
Required Experience/Skills (Must Have)
M.S. OR BS. in Computer Science, Computer Engineering or Electrical Engineering with 1+ years of experience with design expertise with block level synthesis/APR, floorplanning Signoff tool expertise with timing closure, electrical rule checks, noise, power, formal equivalence, RV and LVS/DRC
Strong skills using SNPS DC/ICC/Primetime tools.
Exposure to Conformal LP FEV
Exposure to multi-voltage UPF based designs
Inside this Business Group
The Platform Engineering Group (PEG) is responsible for the design, development, and production of system-on-a-chip (SoC) products that go into Intel’s next generation client and mobile platforms. PEG strives to lead the industry moving forward through product innovation and world class engineering.
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