Intel SoC Design Engineer in Hudson, Massachusetts

Job Description

The SoC Digital Circuit Design Engineer works alongside a World-class SOC design team within the Scalable Performance CPU Development Group SDG delivering next-generation Xeon products and related IPs for Server markets. This role performs all aspects of the SoC design flow from high-level design to synthesis, place and route, timing and power to create a design database that is ready for manufacturing.

Additional responsibilities include (but are not limited to):

  • Block-level floor planning

  • Logic synthesis of design blocks –

  • Formal Equivalence Verification FEV

  • Auto Place-and-Route APR using Synopsys ICC tools –

  • Timing verification using Synopsys PrimeTime as well as Intel tools

  • Physical verification

  • Layout vs. Schematic LVS, Design Rule Checks DRC, Electrical Rule Checks ERC, and Design for Manufacturability checks DFM

  • Assist in the preparation of the full-chip layout design database for introduction to manufacturing


Minimum Skills/Experience (Required)

  • BS in Electrical Engineering, Computer Engineering, or Computer Science, or other related field

  • 5+ years of experience or a MS degree or 4+ years of experience in the following areas:

  • Synopsys SoC design tools, flows and methodology, Design Compiler, IC Compiler/ICC, Primetime,

  • TCL, Perl, programming Additional Preferred Qualifications:

  • Layout cleanup expertise DRCs, density, ipc, etc.

  • Circuit design

Preferred Skills/Experience

Prior Experiences with the following is preferred


  • RTL/Logic design Verilog

  • Computer architecture

  • Python, C and/or C++ programming

Inside this Business Group

The Platform Engineering Group (PEG) is responsible for the design, development, and production of system-on-a-chip (SoC) products that go into Intel’s next generation client and mobile platforms. PEG strives to lead the industry moving forward through product innovation and world class engineering.

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