Intel TEM Prep Technician in Phoenix, Arizona
Candidate will have the exciting opportunity to work with an established, professional team on leading-edge silicon technology and Intel products, solving yield and reliability issues in support of high-volume manufacturing.
Candidate will be responsible for improving wafer/unit-level Low-Yield-Analysis (LYA) Lab technique quality/efficiency/safety, and will facilitate transfer of new techniques in support of new process technologies and products. Candidate will also be responsible for developing on-the-fly solutions to new or ambiguous failure analysis challenges, and for determining root cause of problems encountered with existing tool sets and techniques. Strong partnership with a team of experienced LYA Technicians, Local/Virtual Factory (VF), Failure Analysis (FA)/Fault Isolation Engineers, Field Service Engineers (FSEs), and supporting-group personnel will be critical to meet these goals.
Responsibilities will include, but not be limited to:
• Performing wafer/unit-level Failure Analysis.
• Using Scanning Electron Microscopy (SEM), Focused Ion Beam (FIB) sample preparation for the purposes of executing a Transmission Electron Microscopy (TEM) lift-out. The technique of TEM Prep is a collection of several type of perpetration techniques including cross-section, plan view and other advanced techniques.
• Owning/maintaining LYA Lab equipment.
• Developing/documenting new FA process techniques.
• Driving continuous improvements in safety, quality and output.
The ideal candidate should exhibit the following behavioral traits:
• Analytical problem solving
• Risk taking
• Commitment to task
• Team work
• Oral and written communication
This is an entry level position and will be compensated accordingly.
You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Relevant experience can be obtained through school work, classes and project work, internships, military training, and/or work experience.
• Candidate must possess an Associate or Bachelor's degree in Material Science, Chemical Engineering, Electrical Engineering, or related fields; or equivalent military experience.
• This U.S. position is open to U.S. Workers Only. A U.S. Worker is someone who is either a U.S. Citizen, U.S. National, U.S. Lawful Permanent Resident, or a person granted Refugee or Asylum status by the U.S. Government. Intel will not sponsor a foreign national for this position.
• Minimum of 6 months of experience with SEM.
• Candidate must be willing to work a night shift compressed work week schedule. The schedule will consist of three twelve hour nights in a row followed by a fourth night every other week.
• Experience with Failure Analysis techniques.
• Knowledge of the following areas:
Materials Characterization, Process flow, and cache cell layout.
Wet etch systems and chemistry.
Dry etch systems and chemistry Equipment/Process Engineering Statistics.
Inside this Business Group
As the world's largest chip manufacturer, Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support. Employees in the Technology and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moore’s Law to bring smart, connected devices to every person on Earth
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance....