Intel Senior Digital Design Engineer in San Diego, California

Job Description

Come and join us! Intel is seeking highly qualified candidates to join our Data Center Group (DCG) as a Senior Digital Design Engineer!

As a Senior Digital Design Engineer you will develop and support digital logic design for hardware accelerators used in the L1 processing of LTE and 5G wireless protocol. You will be involved directly in the current development of the communication accelerators used in Xeon server chip.

Responsibilities will include, but not be limited to:

  • Collaborate with the System Architect to review system requirements and provide feedback to the Micro Architect.

  • Develop Specification and Perform detailed logic design at the block level.

  • Perform coding, block level verification and work with the Verification team to validate the design.

  • Support DFT implementation and backend timing closures.

In this position you will gain invaluable experience which will allow growth and expanded opportunities within this business group as well as future possible opportunities with other business groups within Intel.

The Data Center Group (DCG) drives new products technologies from high-end co-processors for supercomputers to low-energy systems for enterprise and the cloud, as well as solutions for big data and intelligent devices. The group is a worldwide organization that develops the products and technologies that power nine of every 10 servers sold worldwide.

www.intel.com/jobs/datacenter

Qualifications

You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Minimum Required Qualifications:

Bachelor degree in Electrical Engineering plus 6 years of related work experience, Master's degree in Electrical Engineering plus 4 years of related work experience, or PhD in Electrical Engineering plus 2 years of related work experience.

  • 6 plus years of experience with Micro Architect and RTL coding for high performance, low power design using Verilog.

  • 4 plus years of experience with Simulation, Lint, CDC and Synthesis using Intel TFM Experience with AXI, IOSF bus protocol and DMA design.

Additional Preferred Qualifications:

  • Prior work in 3GPP FEC, Encoder, Decoder, Demodulation, Digital Filter design is a plus.

  • Able to demonstrate innovative and analytical thinking.

  • Able to plan and organize day to day activities and execute according to plan.

Inside this Business Group

The Data Center Group (DCG) is at the heart of Intel’s transformation from a PC company to a company that runs the cloud and billions of smart, connected computing devices. The data center is the underpinning for every data-driven service, from artificial intelligence to 5G to high-performance computing, and DCG delivers the products and technologies—spanning software, processors, storage, I/O, and networking solutions—that fuel cloud, communications, enterprise, and government data centers around the world.

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