Intel Signal Integrity Power Integrity Engineer in San Jose, California
The Programmable Solutions Group (PSG) at Intel is looking for their next senior level Signal Integrity Power Integrity Engineer to join out team. This position will be responsible for the design and simulation for a variety of core IP’s. They will interface with IP vendors, customers and various internal teams to ensure a successful and competitive product. All work is expected to be of highest production quality and is expected to enable implementation teams to deliver in a timely fashion to hit market windows. The position requires a self-driven candidate with very good knowledge on design and verification as well as good communication skills.
The successful candidate should have an excellent track record in the following areas:
Signal integrity, Power Integrity and Channel modeling
Power integrity analysis for each PWR/GND domain: package extraction, simulation &decoupling strategy
PDN Methodology Development: Simultaneous switching noise/output (SSN or SSO) analysis foreach I/O PWR/GND domain
High speed I/O package design for PCI-E I & II, XAUI, 28+G SerDes, FSB, DDR I, II, III and IV
Flip-chip bump or wirebond pad re-arrangement for chip-package-board co-design
Optimal layer stackup & PWR/GND plane/island assignment to minimize voltagedrop/noise/coupling
Crosstalk analysis and reduction
Design and model characterization boards, load boards, and system level test boards
EMI reduction and shielding techniques
Writing specification for design teams
Presenting design trade-off analyses and implementation recommendations with custom circuitdesigners
Strong Written and Verbal Communication skills
Strong Collaboration skills
Strong Technical Skills (knowledge of Verilog, SystemVerilog or VHDL)
10+ years of professional experience in a semiconductor industry, in a research and development environment
Experience with signal and Power integrity analysis
Experience with lab equipment for high-speed digital systems
Experience with correlating simulation/silicon results.
Experience with the following tools and flows: Hspice, Sigrity (Power SI/XcitePI), Apache (Redhawk/Sentinel-PI), ANSYS (Q3D, HFSS, SIwave).
5+ years of experience in design, characterization, debug of high Speed SERDES ranging from 1G to 32Gbps
Willing to Travel (this position may require minimal travel)
Bachelors Degree in Physics, Electrical Engineering, or related fields
- Masters (or PhD) Degree in Physics, Electrical Engineering, or related fields
Please be informed that Intel is proactively trying to find candidates for a position and that may, or may not, be available for all location(s) at this time. If you're interested in this position, we encourage you to apply, and our hiring team will be glad to contact you if/when relevant.
Inside this Business Group
The Programmable Solutions Group (PSG) was formed from the acquisition of Altera. As part of Intel, PSG will create market-leading programmable logic devices that deliver a wider range of capabilities than customers experience today. Combining Altera's industry-leading FPGA technology and customer support with Intel's world-class semiconductor manufacturing capabilities will enable customers to create the next generation of electronic systems with unmatched performance and power efficiency. PSG takes pride in creating an energetic and dynamic work environment that is driven by ingenuity and innovation. We believe the growth and success of our group is directly linked to the growth and satisfaction of our employees. That is why PSG is committed to a work environment that is flexible and collaborative, and allows our employees to reach their full potential.
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.