Intel Analog Engineer in Santa Clara, California

Job Description

You will be a member of the Non-volatile memory Solutions Group working on NAND memory products as an Analog/Mixed-signal/IO Design engineer. Your responsibilities will include (but are not limited to): NAND Custom & IO circuit design, validation, reliability analysis, timing/chip-planning, layout interaction, extraction and co-optimization. Top level analog system design and integration, intensive analog, IO and mixed-signal validation and debug. Process, device, template evaluation, and characterization. Understand and lead methodology development. The additional responsibilities include the post-silicon electrical validation, Signal Integrity/PD work and interacting with system hardware board teams, post silicon debug, and high volume manufacturing support in the circuit. You will also be responsible for interfacing with cross functional teams (technology, architecture, product engineering etc..) and maybe leading small teams during different phases of product development in addition to owning design tasks. Cross team interface skills along with good written and oral communication skills are very important.


You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates

Minimum Qualifications: The candidate should possess a MS or PhD in electrical Engineering (EE/ECE) with 15+ years of Analog & High-speed IO circuit design industry experience and should have gone through multiple product cycles from definition to design to pre/post-silicon validation to product qualification. Candidate should have 2D or 3D NAND or PCM non-volatile memory design experience with strong fundamentals in Flash-cell/Semiconductor device physics, transistor level analog/mixed signal & I/O datapath circuit design. Candidate should have worked on NAND/DRAM High-speed I/O interface blocks like Transmitter/Receiver/DLL/SerDes and have extensive knowledge of entire NAND memory datapath, Candidate should have very good knowledge of circuit design, layout, circuit reliability tools & methodologies. Preferred Qualifications: Candidate should have experience managing/leading small design teams and products. Candidate having ESD design/verification and signal Integrity Analysis experience/expertise is preferred. Candidate should have experience working with cross functional teams (product engineering, technology, spec development, architecture). Guidance to develop test plans for silicon characterization, document all design work with review materials and detailed design descriptions as well as participate in the writing of datasheets and application notes for customers.

Inside this Business Group

Non-Volatile Solutions Memory Group: The Non-Volatile Memory Solutions Group is a worldwide organization that delivers NAND flash memory products for use in Solid State Drives (SSDs), portable memory storage devices, digital camera memory cards, and other devices. The group is responsible for NVM technology design and development, complete Solid State Drive (SSD) system hardware and firmware development, as well as wafer and SSD manufacturing.

Other Locations

US, California, Folsom

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance....