Intel Digital Design Engineer in Santa Clara, California
Oversees definition, design, verification, and documentation for SoC System on a Chip development.
Determines architecture design, logic design, and system simulation.
Defines module interfaces/formats for simulation.
Performs Logic design for integration of cell libraries, functional units and subsystems into SoC full chip designs, Register Transfer Level coding, and simulation for SoCs.
Contributes to the development of multidimensional designs involving the layout of complex integrated circuits.
Performs all aspects of the SoC design flow from highlevel design to synthesis, place and route, timing and power to create a design database that is ready for manufacturing.
Analyzes equipment to establish operation infrastructure, conducts experimental tests, and evaluates results.
May also review vendor capability to support development.
BS in Electrical/Computer Engineering with 5+ years of work experience or MS in Electrical/Computer Engineering with 4+ years of work experience
Standard cells are the building blocks of modern Chip Design and requires Circuit fundamentals.
Validation work requires some automation/coding skill like in Perl/Python/tcl/C. Need to work well in a team and requires good communication skill to engage with customer and vendors.
This position has plenty of growth opportunities and requires intention to continuously learn and grow and proactively solve problems.
Working knowledge of Library characterization, Synthesis, Place & Route, and timing tools is a PLUS.
Inside this Business Group
The Platform Engineering Group (PEG) is responsible for the design, development, and production of system-on-a-chip (SoC) products that go into Intel’s next generation client and mobile platforms. PEG strives to lead the industry moving forward through product innovation and world class engineering.
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