Intel FIB Circuit Edit Engineer in Santa Clara, California
Intel’s PDDL (Physical Debug and Development Labs) organization is a global network of physical debug labs that deliver world leadership in circuit edit (FIB) development, optical probing solutions, sample prep development and operational excellence in debug of Intel’s products. Our mission is to deliver efficient and timely physical debug solutions with world class quality, enabling Intel products to launch on schedule. Working with our partner organization PDTO (Physical Debug Technology Development Office) we are working to deliver the next generation of physical debug capabilities to intercept the most advanced process nodes (7 nm, 5 nm, 3 nm) We are currently looking for Engineers that will help us in execution of experiments for advanced ion beam characterization, providing analytical support on platform characterization and qualification, and debug support operations for a wide range of Intel products and market segments.
The FIB Circuit Edit Engineer will be responsible for:
Operations and technology development work that delivers Intel's Focused Ion Beam FIB equipment and process technology for component physical debug.
Must learn and operate FIB and Dual Beam FIB tools to accomplish circuit edits on Intel products
Evaluation, development and implementation of complex FIB tool recipes to deliver circuit edit capabilities
Analyzes and evaluates component specification and functionality versus actual performance with Intel's product teams to isolate and plan debug activities for the product
Analyzes early silicon failures or bugs, with emphasis on driving physical debug methodologies most importantly focused Ion Beam activities
Creates and applies concepts for optimizing component debug relative to both quality and cost constraints
Autonomously plans and schedules own daily tasks, develops solutions to problems utilizing formal education and judgment
Bachelor’s degree in Electrical Engineering, Materials Science, Physics, or similar technical degree with 4+ years of experience
Master’s degree in Engineering, Materials Science, Physics, or similar technical degree with 3+ years of experience
Experience and skills in the following areas:
Fundamental knowledge of advanced CMOS-VLSI circuits, electronics, device physics or Fab process technologies and flows
Experience in equipment, tools, and analytical tool use in Labs
Ability to read circuit schematics and layouts
Applied beam physics & hands-on tool experience with electronics and failure analysis tools operation and capability development experience is desired .e.g. FIB, SEM, TEM, Optical and Infrared microscopy
Knowledge of device circuit edit technology and techniques
- Experience/background in materials science, semiconductor device physics, and vacuum systems in labs
Inside this Business Group
The Platform Engineering Group (PEG) is responsible for the design, development, and production of system-on-a-chip (SoC) products that go into Intel’s next generation client and mobile platforms. PEG strives to lead the industry moving forward through product innovation and world class engineering.
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