Intel Pre-Si Validation Engr. in Santa Clara, California
Develops pre-Silicon functional validation tests to verify system will meet design requirements. Creates test plans for RTL validation, defining and running system simulation models, and finding and implementing corrective measures for failing RTL tests. Analyzes and uses results to modify testing.
- Oversees verification SoC System on a Chip and SiP System in Package development.-
Synopsys VCS, Verdi and DVE-
Knowledge of UVM/OVM including developing verification test benches and constrained random validation.-
Strong independence and proven ability to set and meet own goals-
Possess excellent written and interpersonal skills
Qualifications:- MS/BS degree in EE or ECE or CS Engineering with 8 years of industry experience.-
Experience with Computer Architecture or pre-Si verification.-
Experience with Logic Design or Design-For-Test DFT.-
Experience with Microprocessor or Chipset design methods.-
Experience with System On Chip Integration and/or Verification.-
Strong collaboration and interpersonal skills.
Additional desired skills:- Ability to create and execute test plans for wide feature set.-
Ability to debug and root cause failure signatures at RTL level.-
Scripting and tool flow automation knowledge, such as Python/Perl.-
Knowledge of using emulation platform as a pre-silicon validation vehicle .
Inside this Business Group
The Platform Engineering Group (PEG) is responsible for the design, development, and production of system-on-a-chip (SoC) products that go into Intel’s next generation client and mobile platforms. PEG strives to lead the industry moving forward through product innovation and world class engineering.
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