Intel Principal Engineer - SoC Validation in Santa Clara, California
Intel’s Scalable Performance CPU Development Group (SDG) is looking for an experienced Principal Engineer to own and lead SOC validation execution for Intel's next generation High Performance Computing and Artificial Intelligence products. The candidate will be responsible for driving efficiencies in validation strategies for an SOC environment by taking a holistic view starting from planning, architecture, design, validation and production. Candidate will work closely with the SOC architecture teams, design teams, platform teams and Post Silicon teams to develop optimal solutions. Work with existing teams to develop efficient validation methodologies and execution strategies. As part of this process, he or she will be required to assess risks and identify solutions that accelerate validation execution in an SOC environment.
Main responsibilities for this role will include:
Drive SOC Validation methodologies as well as tool flows. SOC validation strategies for future and tactical approaches for current generation to enable high quality SOC.
Working with the SOC Val technical leads in a hands-on fashion.
Technical assessment of SOC feature asks and recommendations to management of the complexity and risk profiles related to validation.
Drive strategies to enable SOC Independent development platform
Provide technical assessment and interpretation as well as solutions to senior management of the technical risks in execution based on the wide range of SOC Val technical indicators
Develop global staging validation plans in partnership with SOC fabric and IP and Subsystems
Develop strategies to reduce integration times and improve performance times at SOCs
Develop strategies to maximize emulation and validation
Influence and co-optimize platform and CPU
Bachelor's or a Master's degree in Electrical Engineering or Computer Engineering or Computer Science with 15+ years of relevant experience.
Key elements for successful candidate are as below:
- Strong Validation/Logic technical and strategic leadership skills with hands-on expertise
-Proven track record of active engagement and technical delivery of high quality complex IPs or SOCs across multiple design generations is required.
The candidates should exhibit detailed understanding of the technical validation concepts, architecture, systems, development methods and disciplines associated with the program and utilize knowledge to accelerate the program's completion.
Excellent written and verbal communication skills ability to communicate with customers & senior management.
Data-driven decision making and balanced approach to enable business objectives
Self-starter, self-motivator, and highly adaptable
Strong demonstration of ability to innovate.
Inside this Business Group
The Platform Engineering Group (PEG) is responsible for the design, development, and production of system-on-a-chip (SoC) products that go into Intel’s next generation client and mobile platforms. PEG strives to lead the industry moving forward through product innovation and world class engineering.
US, Oregon, Hillsboro
Posting Statement. Intel prohibits discrimination based on race, color, religion, gender, national origin, age, disability, veteran status, marital status, pregnancy, gender expression or identity, sexual orientation or any other legally protected status.
Position of Trust. This role is a Position of Trust. Should you accept this position, you must consent to and pass an extended Background Investigation, which includes (subject to country law), extended education, SEC sanctions, and additional criminal and civil checks. For internals, this investigation may or may not be completed prior to starting the position. For additional questions, please contact your Talent Consultant.