Intel SOC Logic Design & Integration in Santa Clara, California
In this position you will be developing a ground breaking custom high performance SOC. This is a great opportunity to join the front-end design team in a logic design and integration role, early in the product lifecycle, as we enter the technology readiness (TR) phase, then move into design and execution (EXE). This program will include innovation in system to achieve performance across a broad scope of system components including computing (core/un-core), interconnect (on-die, on-MCP, off-MCP), silicon technologies, packaging, reliability and system software.
The responsibilities will be tailored to the candidate’s skills and expertise and will include several of the following, but not be limited to:
Ensuring the logic design meets the architectural specifications
Contributing at multiple levels on the micro-architecture features and specification.
Implementing block/sub-system level logic design (RTL) using System Verilog.
Working with structural design engineers (physical design) on timing closure of critical structures.
SOC level logic integration.
You must be able to balance design trade-offs with modularity, scalability, DFX requirements, chassis compliance, power, area, and performance.
Review and direct technical aspects of engagement with contingent workforce
Must have a BS or MS in Electrical Engineering, Computer Engineering, or Computer Science and 5+ years of experience in RTL/Logic design on ASIC’s or IP blocks or SOC's using System Verilog RTL coding.
Strong background in computer architecture
Strong analytical ability, problem solving and communication skills
Ability to work independently and at various levels of abstraction
Demonstrable experience writing System Verilog
Programming experience in C++, Perl and Assembly Algorithms and digital logic
Familiarity with a range of internal and 3rd-party logic design tools
Strong communication and team work stills.
Preferred Skills:The ideal candidate will be able to demonstrate the following behaviors:
Experience with SoC integration.
Experience in DFX, design for test, debug, and manufacturing.
Experience in post-Si validation/debug
UVM/OVM testbench experience
Ability to work effectively with both internal and external teams/customers is expected.
Ability to mentor other engineers and technically guide them.
Capable of working in a high performing team to deliver the results required from the organization.
Facilitator of direct and open communication, diversity of opinion, and debate.
Please be informed that Intel is proactively trying to find candidates for SOC Designers and that this position may not be available at this time.
Inside this Business Group
The Data Center Group (DCG) is at the heart of Intel’s transformation from a PC company to a company that runs the cloud and billions of smart, connected computing devices. The data center is the underpinning for every data-driven service, from artificial intelligence to 5G to high-performance computing, and DCG delivers the products and technologies—spanning software, processors, storage, I/O, and networking solutions—that fuel cloud, communications, enterprise, and government data centers around the world.
US, Oregon, Hillsboro;
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